In a general purpose data processing system where a number of devices, such as central processing units, have access at various times to the main memory associated with the system, it is desirable to avoid situations wherein two devices are simultaneously granted access to the same specified memory location or even to the same block of memory, for purposes of carrying out therein certain unique sequences of operation. For example, a commonly encountered unique operational sequence is referred to as a read-alter-write operation and it involves reading data out of a specified memory location located within a selected memory block, processing the data read out, and writing the processed (altered) data back into the specified memory location. Thus, it is important that another device of the data processing system, e.g., another CPU, not have access to the selected block of memory of the specified memory location during the interval when a first CPU holds access.
The main memory of a data processing system may also be employed for other types of operation, e.g., for the purpose of providing notification of the occurrence of a significant event. For example, if a data processing device, such as a disk drive, terminates a particular operation, the occurrence of that event may be of significance to a number of other devices of the data processing system. Thus, a previously specified location of the memory may be used to give notice of the occurrence of that event to all devices seeking access to the memory.
For example, the "0" memory location (least significant location) may conveniently be employed for that purpose. Any device having need of the information contained in the respective cells at the "0" memory location, will read the contents of the cells to determine whether or not they apply to the operation the inquiring device is to carry out. These cells are frequently referred to as interrupt cells since the inquiring device may, if the information read out from the cells applies to it, interrupt its own operation . If it does not apply, the contents of the interrupt cells may be returned as received from the specified memory location, i.e., the cells will be restored in their former state. However, if the information contained in the interrupt cells applies to the inquiring device, the cells are reset to a standard condition, e.g., to the "1" state, to await setting at some other time in accordance with some further event of which notification is to be given. As in the case of memory locations involving a read-alter-write operation, during the interval when a particular device has access to the interrupt cells, access to these cells must be denied to any other device seeking information contained in it in order not to give misinformation about the recorded event or events.
In prior art devices such lockout schemes are frequently costly to implement and they often have a tendency to deteriorate system performance. Prior art lockout systems may fail to discriminate between the various operations relative to a particular block. Thus, while a first device has access to a selected memory block, it may not be necessary to deny a second device access to the same block for a non-interferring use. For example, while a first device is carrying out a read-alter-write operation in a selected memory block, a non-altering read operation or normal write operation carried out simultaneously by another device in the same block may be permissible if it does not interfere with the first operation or give misinformation to the other device. To prevent the second device simultaneously carrying out such normal operations adds nothing to the security of the information stored in the selected memory block from an overall data processing system viewpoint, while slowing down and thereby degrading the performance of the overall data processing system.